Ball grid array (BGA) semiconductor devices have become a mainstream package product lately because arrayed solder balls implanted on the bottom surface of a substrate to which a semiconductor die is adhered, are capable of providing increased I/O connections to the semiconductor die with external devices such as printed circuit board, when compared to conventional leadframe-based semiconductor devices. Further, the pitch between any two adjacent solder balls can be effectively reduced such that a substrate can accommodate a larger number of solder balls thereon. As a result, such BGA semiconductor device can meet the requirement in I/O connection for a high density semiconductor die.
During wire bonding of the above-mentioned conventional BGA semiconductor devices for electrically coupling the semiconductor die to the substrate onto which the semiconductor die is attached a wire bonding tool is used to first ball bond the free end of a bonding wire to a bond pad on the semiconductor die, and then stitch bond the opposite end of the bonding wire to the substrate. Right after the ball bond at the bond pad on the semiconductor die is made, the wire bonding tool is to pull the bonding wire upward to a preset height and thereafter outwardly downward to the bonding area on the substrate. This makes the top point of the wire loop formed by the bonding wire higher than the semiconductor die so that the resin encapsulant that encapsulates the semiconductor die and gold wires should have a thickness sufficient to cover the top point of the wire loop in order to prevent the bonding wires from exposure. As a result, the thickness of the encapsulated semiconductor device can not be effectively reduced.
In order to resolve the drawback in thickness of the above-mentioned conventional BGA semiconductor devices, a BGA semiconductor device with a thin profile is disclosed, as shown in FIG. 12. This BGA semiconductor device 1 includes a substrate 11 for a semiconductor die 10 to be mounted thereon and having a hole 110 formed therewith. The hole 110 is for bonding wires 12 to pass therethrough for providing electrical connection between the semiconductor die 10 and conductive traces 111 formed on the substrate 11. After wire bonding of the bonding wires 12 is completed, a lower encapsulant 13 is formed to encapsulate the bonding wires 12 and hole 110. Since a part of the wire loop of the bonding wires 12 is positioned within the substrate 11 and merely another part of the wire loop of the bonding wires 12 extends beyond the bottom surface of the substrate 11, the height h of the lower encapsulant 13 protruding from the bottom surface of the substrate 11 can be controlled to be lower than the height H of the solder balls 14 implanted on the bottom surface of the substrate 11. Therefore, the thickness of the upper encapsulant 15 only needs to be sufficient to encapsulate the semiconductor die 10 without the consideration of the height of wire loop of the bonding wires 12. As a result, the semiconductor device 1 is lower in height than the above-mentioned conventional BGA semiconductor device.
Although the semiconductor device 1 shown in FIG. 12 is capable of effectively reducing the overall height, it still has the following drawbacks. First, in order to prevent the conductive traces 111 on the substrate 11 from being exposed to the atmosphere, it is necessary to provide a solder mask layer 112 on the bottom surface of the substrate 11 to completely cover the conductive traces 111. The application of the solder mask layer 112 thus increases the cost for making the substrate 11. Also, the use of solder mask layer 112 results in hygroscopicity concern and to cope with this problem the cost for the manufacture of the substrate 11 further increases. Further, the semiconductor device 1 is of a low profile such that, when being mounted by conventional methods such as surface mounting technology to external devices such as printed circuit board, the semiconductor device 1 tends to warp as the coefficient of thermal expansion of the substrate 11 is different from that of the upper encapsulant 15. Warpage of the semiconductor device 1 accordingly causes the semiconductor die 10 to delaminate from the substrate 11 and adversely affect the electrical connection with external devices.
Moreover, to avoid warpage from occurrence the thickness of the substrate 11 may be increased to resist thermal stress; nevertheless this not only increases the cost of the substrate 11 but also increases the overall height. Meanwhile, during electrical performance testing of the semiconductor device 1, the tips of testing probes (not shown) do not usually have complete contact with the solder balls 14 as the lower ends of the solder balls 14 are spherical in contour. When the contact of the testing probes with the solder balls is incomplete, the test result is accordingly misleading. Besides, the semiconductor device 1 requires expensive ball-implantation machines to implant solder balls 14, making the overall packaging cost difficult to be reduced. Also, after the solder balls 14 are implanted onto the substrate 11 the planarity of the bottom ends of solder balls 14 is difficult to maintain, thus resulting in poor quality of the electrical connection between the semiconductor device 1 and the external device.